Links between chips (e.g., processors) transmit control information and data over the same set of wires. On a global memory interconnect (GMI) link, for example, each link packet transmitted is 128 B wide. A typical request transmission over a link includes a “request” command, “response” command, and an “acknowledgment” (ACK) command, to complete a transaction. These three commands are control packets and are considered overhead. A typical cache line in a system is 64 B. Therefore, in order to transmit 64 B of data over the link, it takes 4 link packets and another 3 link packets to transmit the command packets.